Design of 1V Opamp Using Standard Digital CMOS Technology
نویسندگان
چکیده
This paper addresses the issues involved in designing 1V Op-amp in standard digital CMOS technology. Bulk-driving technique is used to circumvent the metal–oxide semiconductor field-effect transistor turn-on (threshold) voltage requirement. The Op-amp will be designed in a Europractice 0.7μm n-well CMOS process having threshold voltage of 0.76V and –1V for NMOS and PMOS respectively. Simple and cascode bulk driven current mirror are designed in which all transistors are operated in saturation instead of linear as proposed in [1]. This helps in achieving great degree of matching. A 1V bulk driven Opamp is designed using this cascode current mirror. The open-loop gain of the amplifier is 67.5dB, the gain bandwidth product is 584KHz and phase margin is 48.5°. Power Consumption of the opamp is 20μW.
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